unsigned long dom_memsize = memsize << 20;
unsigned long nr_pages = memsize << (20 - PAGE_SHIFT);
unsigned long vcpus;
-
- unsigned long nvram_start = NVRAM_START, nvram_fd = 0;
+ unsigned long nr_special_pages;
+ unsigned long memmap_info_pfn;
+ unsigned long memmap_info_num_pages;
-
++ unsigned long nvram_start = NVRAM_START, nvram_fd = 0;
int rc;
long i;
DECLARE_DOMCTL;
goto error_out;
}
- xc_get_hvm_param(xc_handle, dom, HVM_PARAM_NVRAM_FD, &nvram_fd);
- if ( !IS_VALID_NVRAM_FD(nvram_fd) )
- nvram_start = 0;
- else
- if ( copy_from_nvram_to_GFW(xc_handle, dom, (int)nvram_fd ) == -1 )
- nvram_start = 0;
+ if (xc_ia64_setup_memmap_info(xc_handle, dom, dom_memsize,
+ pfn_list, nr_special_pages,
+ memmap_info_pfn, memmap_info_num_pages)) {
+ PERROR("Could not build memmap info\n");
+ goto error_out;
+ }
+ if (xc_ia64_setup_shared_info(xc_handle, dom,
+ domctl.u.getdomaininfo.shared_info_frame,
+ memmap_info_pfn, memmap_info_num_pages)) {
+ PERROR("Could not setup shared_info\n");
+ goto error_out;
+ }
+
++ xc_get_hvm_param(xc_handle, dom, HVM_PARAM_NVRAM_FD, &nvram_fd);
++ if ( !IS_VALID_NVRAM_FD(nvram_fd) )
++ nvram_start = 0;
++ else if ( copy_from_nvram_to_GFW(xc_handle, dom, (int)nvram_fd ) == -1 )
++ nvram_start = 0;
+
vcpus = domctl.u.getdomaininfo.max_vcpu_id + 1;
// Hand-off state passed to guest firmware
class IA64_HVM_ImageHandler(HVMImageHandler):
+ def buildDomain(self):
+ xc.nvram_init(self.vm.getName(), self.vm.getDomid())
+ return HVMImageHandler.buildDomain(self)
+
def getRequiredAvailableMemory(self, mem_kb):
page_kb = 16
- # ROM size for guest firmware, ioreq page, pio page and xenstore page
- extra_pages = 1024 + 4
+ # ROM size for guest firmware, io page, xenstore page
+ # buffer io page, buffer pio page and memmap info page
+ extra_pages = 1024 + 5
return mem_kb + extra_pages * page_kb
def getRequiredInitialReservation(self):
#define MEM_G (1UL << 30)
#define MEM_M (1UL << 20)
+ #define MEM_K (1UL << 10)
+/* Guest physical address of IO ports space. */
+#define IO_PORTS_PADDR 0x00000ffffc000000UL
+#define IO_PORTS_SIZE 0x0000000004000000UL
+
#define MMIO_START (3 * MEM_G)
#define MMIO_SIZE (512 * MEM_M)